Hardware Implementation of High-Precision Priority Encoders
Location
Ada, Ohio
Start Date
3-12-2024 12:00 AM
End Date
3-12-2024 12:00 AM
Description
We introduce a generalized method for constructing high-precision priority encoders and decoders by dividing them into multiple levels. This builds upon our previous work which introduced the idea of two-level hardware. We extend this concept to three levels using two different techniques (cascading and composition) and comment on further generalization. We analyze hardware delay and complexity as a function of input precision for both FPGA and ASIC implementation technologies. Our results show that the two-level priority encoder reduces complexity by about half, with a corresponding increase in delay. Adding additional levels introduces incremental improvements, but has overhead and diminishing returns. Thus, each number of levels is best for a particular range of input precisions.
Recommended Citation
Phillips, Maxwell, "Hardware Implementation of High-Precision Priority Encoders" (2024). College of Engineering Student Research Colloquium. 5.
https://digitalcommons.onu.edu/eng_student_research_colloquium/2024/Presentations/5
Hardware Implementation of High-Precision Priority Encoders
Ada, Ohio
We introduce a generalized method for constructing high-precision priority encoders and decoders by dividing them into multiple levels. This builds upon our previous work which introduced the idea of two-level hardware. We extend this concept to three levels using two different techniques (cascading and composition) and comment on further generalization. We analyze hardware delay and complexity as a function of input precision for both FPGA and ASIC implementation technologies. Our results show that the two-level priority encoder reduces complexity by about half, with a corresponding increase in delay. Adding additional levels introduces incremental improvements, but has overhead and diminishing returns. Thus, each number of levels is best for a particular range of input precisions.